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Topic 1.1 Systems Architexture - Coggle Diagram
Topic 1.1 Systems Architexture
1.1.1 Von Neuman Architecture
Components
Arithmetic Logic Unit
Carries out logical processes and arithmetic and also bit shifts.
Cache
Holds frequently used instructions.
Control Unit
Decodes instructions.
FDE Cycle
Decode
Control Unit decodes the instruction/data.
Execute
Instruction is carried out.
Fetch
An instruction is fetched from the main memory and sent to the Control Unit.
PC->MAR->Main Memory->MDR->CU (decoded)->(next location varies)
Registers
Program Counter
Holds the address of the next instruction to be processed.
Memory Address Register
Holds the memory address of the next instruction/data to be fetched from main memory
Accumulator
Special Purpose Register that stores the results of calculations from the ALU which it is directly connected to.
Memory Data Register
Holds the instruction or data temporarily after being fetched from main memory.
1.1.2 CPU Performance
Number of Cores
Number of processors so the number of processes to be performed simultaneously is the number of cores, software has to be optimized for the number of cores
Clock Speed
Clock speed is the number of FDE Cycles done every second. It is measured in Hertz because it is a frequency, increasing clock speed can overclock a processor and reduces the lifespan of the CPU.
Cache Memory
Data is stored in a linear sequence (list) and the more storage in the cache, the slower the cache is because of latency and it takes longer for cache to go down the list.
1.1.3 Embedded Systems
Microprocessors that serve a dedicated function, built into a larger system.
Properties
Reliable
Minimal components
Limited operating system
Limited amount of memory
simple interface (button/dial/switch)
might include sensors for responding to enviroment