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Successive Approximation ADC - Coggle Diagram
Successive Approximation ADC
Basic Concept
Successive Approximation Register
Holds intermediate digital value
Controls D/A conversion for each bit
Updates bits based on comparison
Sample-and-Hold Circuit
Holds input voltage constant during conversion
Prevents signal fluctuation from affecting result
Ensures accurate step-by-step comparison
Binary Search Approach
Compares analog input against generated levels
Reduces number of required comparisons
Determines digital value iteratively
Conversion Procedure
Initialize
Most significant bit
All other bits = 0
Sets starting point for binary search
Iterative Comparison
Compare input voltage h(t) with V−
Convert SAR value to analog via D/A
Keep or reset bit based on comparison
Final Result
Output digital value w(t)
Input must remain constant during conversion
Conversion completes after all bits tested
Advantages
High Resolution
Suitable for precise measurements
Ideal for audio applications
Distinguishes many voltage levels
Moderate Speed
Reliable for steady signals
Adequate for medium-speed applications
Conversion predictable and stable
Hardware Efficiency
Fewer comparators than flash ADC
Lower power and circuit complexity
Requires log₂(n) bits for n digital levels
Extensions & Related ADCs
Integrating ADCs
Two-phase measurement
Output Vout
Often implemented with capacitor in op-amp feedback
Use Cases
Noise reduction applications
Precision low-speed measurement
Electrical instrumentation
Pipelined ADCs
Chain of small-bit converters
Residue scaled and passed to next stage
Higher throughput, increased latency