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digital electronics - Coggle Diagram

- - - - gate level minimization
        
        combinational logic circuits
        
        flip flops and sequential circuits
        
        register and counters
        
        memory and programmable logic
        
        data communication
        
        9 more items...
        
        programming array logic
        
        ram vs rom
        
        programmable logic array
        
        operational amplifier (op- amp)
        
        read only memory(rom)
        
        ring counter
        
        shift registers
        
        ripple counter
        
        design 101 sequence detector
        
        amortized analysis for increament in counter
        
        universal shift register
        
        n bit johnson counter
        
        rtl(register transfer level) design vs sequential logic design
        
        design counter for given sequence
        
        verilog data types
        
        counters
        
        introduction of sequential circuits
        
        synchronous sequential circuits
        
        master slave jk flip flop
        
        asynchronous sequential circuits
        
        flip flops(types and conversions)
        
        difference between combinational and sequential circuit
        
        one bit memory cell
        
        rtl(register transfer level) design vs sequential logic design
        
        latches
        
        difference between synchronous and asynchronous sequential circuits
        
        half adder and half subtractor using nand nor gates
        
        full adder
        
        half subtractor
        
        full subtractor
        
        half adder
        
        code converters-bcd(8421) to/from excess 3
        
        code converters- binary to/from gray code
        
        code converters- bcd to 7 segment decoder
        
        parallel adder and parallel subtractor
        
        carry look ahead adder
        
        magnitude comparator
        
        bcd adder
        
        encoders and decoders
        
        encoder
        
        binary decoder
        
        combinational circuits using decoder
        
        multiplexers
        
        static hazards
        
        k map(karnaugh map)Link Title
        
        Implicates in K map
        
        5 variable k map
        
        variable entrant map(vem)
        
        minimization of boolean functions
        
        consensus theorem
      - Representation of Boolean functions
      - Properties of Boolean algebra
      - Canonical and standard form
      - Functional completeness
      - Logic gates