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semiconductors - Coggle Diagram
semiconductors
p-n junction
construction
- Due to the carrier concentration gradients between p-side and n-side, majority carriers diffuse across the junction creating a diffusion current. This will happen quickly near the junction.
- Free electrons (majority carriers) diffuse from n-side to p-side and recombine with free holes. Free holes (majority carriers) diffuse from p-side to n-side and recombine with free electrons.
- The uncompensated ionized donors and acceptors also create an electric field (points from n-side to p-side)
- The electric field opposes the diffusion current, causing majority carriers near the junction to get pulled pack. Current caused by electric fields is called drift current.
- It will eventually reach equilibirum where diffusion current has created so much charge difference that the drift current neutralizes the diffusion, the charge difference (potential) is called V₀.
- N-side has majority carriers (free electrons) and ionized donors (positive charges), resulting in net neutral charge. P-side has majority carriers (free holes) and ionized acceptors (negative charges), resulting in net neutral charge.
- As majority carriers diffuse and recombine near the junction, they leave behind uncompensated ionized donors (positive) in the n-side and uncompensated ionized acceptors (negative) in the p-side.
- There will still be a little current (reverse saturation current Iₛ) from the minority carries that gets swept across the junction (drift current) by the electric field.
- Equilibrium \(\iff\) Fermi levels of both sides align, the Eᵢ closest to the Fermi level is the most heavily doped. V₀ appears as a continous band jump in the energy band diagram
forward bias (voltage)
- Applied voltage reduces built-in potential (V₀ - V)
- The applied voltage opposes V₀, pushing major carriers to the junction instead of pulling them away like V₀. This makes the depletion region narrower and also more diffusion current.
- The total electric field is always p to n in forward bias.
reverse bias (voltage)
- Applied voltage increases potential barrier (V₀ + V)
- The applied voltage aligns with V₀, pulling major carries even farther away. This widens the depletion region, and the resistance increases (same Iₛ regardless of V).
- The total electric field is always n to p in forward bias.
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BJT (p-n-p)
operation
saturation (very on)
E-B is forward biased, and B-C is forward biased
cutoff (off)
E-B is reverse biased, and B-C is reverse biased
normal active (on)
E-B is forward biased, and B-C is reverse biased
inverted
E-B is reverse biased, and B-C is forward biased
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doping
p-type
- p-type is doped with e.g. boron, which has 3 valence electrons instead of 4 electrons like silicone
- the boron atoms is called the acceptors, which becomes negatively charged as it accepts an electron
- this creates more holes than electrons
- holes are the majority carrier
- electrons are the minority carrier
n-type
- n-type is doped with e.g. phosphor, which has 5 valence electrons, instead of 4 electrons like silicone
- phosphorus atoms is called the donor, which becomes positively charged as it donates the extra electron
- electrons are the majority carrier
- holes are the minority carrier
- this creates more electrons than holes
MOS
FET
- The substrate is p-type. Source and drain are n+-type that form p-n junctions with the substrate. The region between source and drain is called the channel. There is a gate above the channel (insulated by a layer inbetween), using capacitance to control the flow of current in the channel.
- There will be diffusion between
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Capacitor
- There is a metal/polysilicon gate on top, oxide in middle, and then p-type semiconductor substrate on the bottom. Voltage is applied on the gate, and the substrate is grounded.
- When voltage is applied, it pushes the free holes (majority carrier) down, making a circular depletion region cloes to the oxide/gate. The depletion region has ionized acceptors (negative). This is called depletion mode
- The voltage also pulls electrons up, but there is only a minority of free electrons in p-type. However, the voltage affects the region close to it, bending the conduciton band closer to the fermi level (average electron energy), making more thermally generated electrons. This is called inversion, because the substrate behaves like a n-type close to the gate. Note that there are still ionized acceptors there (unusual), and inversion mode must have a larger voltage compared to depletion mode.
- If the voltage is inverted/negative, then it pulls holes up. This is called accumulation mode
band diagram
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\(E_{FS}, E_i, E_{VS}\) are continous and have constant spacing (bandgap \(E_g\) energy)
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