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New Reconfigurable CIM Development & Tapeout, Research Expolation &…
New Reconfigurable CIM Development & Tapeout
Specification / Target
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New Reconfigurable CIM Macro
CIM Macro .lib File
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CIM Macro Integration
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New Tech Files TSMC 28nm
28nm SRAM Compiler
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Required Files for Tapeout
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Tapeout
Trial-run Version
RTL Simulation :check:
Synthesis :check:
Gate-level Simulation :check:
APR Process :check:
Post Simulation :check:
Final Version
New Features & Fine-Tuning :fire:
RTL Simulation :fire:
Gate-level Simulation
APR Process
Post Simulation
Research Expolation & Documents Handling
Research
HLS
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Reconfigurable HW Architecture
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AI on Chip
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Documents
28nm SRAM Compiler
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SWIFFT Tapeout Report
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New Reconfigurable CIM Tapeout Report
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Measurement Documentation
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CIM Chip version 1.5 Measurement
Debugging
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