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Computer Architecture Memory Organization - Coggle Diagram
Computer Architecture Memory Organization
Memory Hierarchy
Registers
Cache
Level 1 Cache
Level 2 Cache
Level 3 Cache
Main Memory (RAM)
Secondary Storage (Hard Disk Drive, Solid State Drive)
Memory Technologies
Dynamic Random-Access Memory (DRAM)
Static Random-Access Memory (SRAM)
Flash Memory
Magnetic Disk Storage
Addressing and Address Spaces
Memory Addressing Modes
Virtual Memory
Paging
Segmentation
Caches
Cache Organization
Cache Mapping Techniques
Direct Mapping
Associative Mapping
Set-Associative Mapping
Cache Replacement Policies
Least Recently Used (LRU)
First-In-First-Out (FIFO)
Random
Cache Coherence
Memory Access and Operations
Read and Write Operations
Byte Ordering (Little Endian, Big Endian)
Memory Bus
Memory Timing and Latency
Memory Management
Memory Allocation
Memory Deallocation
Fragmentation
Garbage Collection
Non-Volatile Memory
Flash Memory
Solid State Drives (SSD)
Emerging Technologies (MRAM, PCM)
Error Detection and Correction
Parity Checking
Error-Correcting Codes (ECC)
Hamming Codes
Memory Protection and Security
Memory Segmentation
Memory Access Control
Address Space Layout Randomization (ASLR)
Data Execution Prevention (DEP)
Virtual Memory
Page Tables
Page Faults
Page Replacement Algorithms
Least Recently Used (LRU)
First-In-First-Out (FIFO)
Clock
Memory Performance and Optimization
Cache Optimization Techniques
Prefetching
Cache Blocking and Tiling
Locality of Reference