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Control Unit Operation - Coggle Diagram

- - - - MAR ← Save_Address PC <- routine-address
      - Memory ← (MBR)
      - MBR ← (PC)
  - - - MBR ← Memory
      - IR(Address) ← (MBR(Address))
      - MAR ← (IR(Address))
  - - - Execute
      - Interrupt
      - Indirect
      - Fetch
- - - - ALU
      - Registers
      - Internal Data Paths
      - External Data Paths
      - Control Unit
  - - - Transfer data antar-register
      - Transfer data dari register ke external
      - Transfer data dari external ke register
      - Operasi aritmatika dan logical
- - - - Unique logic for each op-code
      - Decoder takes encoded input and produces single output
      - n binary inputs and 2n outputs
      - Op-code causes different control signals for each different
        instruction
    - - Different control signals at different times within instruction Cyle
      - Period must be long enough to allow signal propagation
      - Useful for measuring duration of micro-ops
      - Need a counter with different control signals for t1, t2 etc.
      - Repetitive sequence of pulses