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Control Unit Operation - Coggle Diagram

- - - - Connected to address bus
      - Specifies address for read or write op
    - - Connected to data bus
      - Holds data to write or last data read
    - - Holds address of next instruction to be fetched
    - - Holds last instruction fetched
  - - - t1: MAR <- (PC)
        
        t2: MBR <- (memory)
        
        PC <- (PC) +1
        
        t3: IR <- (MBR)
    - - t1: MAR <- (PC)
        
        t2: MBR <- (memory)
        
        t3: PC <- (PC) +1
        
        IR <- (MBR)
  - - - MAR <- (IR address) - address field of IR
        
        MBR <- (memory)
        
        IR address <- (MBR address)
  - - - t1: MBR <-(PC)
        
        t2: MAR <- save-address [somewhere in stack]
        
        PC <- routine-address [interrupt handler]
        
        t3: memory <- (MBR)
    - - May be additional micro-ops to get addresses
      - N.B. saving context is done by interrupt handler
        routine, not micro-ops
  - - - t1: MAR <- (IR address)
        
        t2: MBR <- (memory)
        
        t3: R1 <- R1 + (MBR)
    - - t1: MAR <- (IR address)
        
        t2: MBR <- (memory)
        
        t3: MBR <- (MBR) + 1
        
        t4: memory <- (MBR)
        IF (MBR) == 0 then PC <- (PC) + 1
    - - Address of instruction following BSA is saved in X
        Execution continues from X+1
      - t1: MAR <- (IR address) MBR <- (PC)
        
        t2: PC <- (IR address) memory <- (MBR)
        
        t3: PC <- (PC) + 1
  - - - Instruction cycle code (ICC) designates which part of cycle the processor is in
        
        00: Fetch
        
        01: Indirect
        
        10: Execute
        
        11: Interrupt
- - - - Basic Elements of Processor
        
        ALU
        
        Registers
        
        Internal data paths
        
        External data paths
        
        Control Unit
    - - Types of Micro-operation
        
        Transfer data between registers
        
        Transfer data from register to external
        
        Transfer data from external to register
        
        Perform arithmetic or logical ops
    - - Functions of Control Unit
        
        Control unit (CU) is part of the processor
        
        Sequencing (flow control)
        Causing the CPU to step through a series of microoperations
        
        Execution
        Causing each micro-op to be performed
- - - - Repetitive sequence of pulses
      - Useful for measuring duration of micro-ops
      - Period must be long enough to allow signal propagation
      - Different control signals at different times within instruction cycle
      - Need a counter with different control signals for t1, t2 etc.