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Instruction Sets: Addressing Modes and Formats - Coggle Diagram
Instruction Sets:
Addressing Modes and Formats
Addressing
Register Addressing
Limited Number of registers
Advantages
Very small address field needed
No memory access
Very fast execution
Operand is held in register named in
address filed, EA=A.
Very limited address space
Register Indirect Addressing
Operand is in memory cell pointed to by
contents of register R
C.f. indirect addressing, EA = (R)
Large address space (2^n)
One fewer memory access than indirect
addressing
Indirect Addressing
Large address space
May be nested, multilevel, cascaded
Memory cell pointed to by address field contains the address of
the operand, (EA) = address field (A)
Multiple memory accesses to find operand, hence slower
Displacement Addressing
requires the instruction to have
two address fields
three of the most common uses
of displacement addressing
A very powerful mode of addressing , EA = A + (R)
Direct Addressing
No additional calculations to work out
effective address
Limited address space
Effective address (EA) = address field (A)
Stack Addressing
sometimes referred to
pushdown list or last-in-first-out queue
Operand is (implicitly) on top of stack
Immediate Addressing
No memory reference to fetch data, fast
Limited range
The simplest form
x86 and ARM Instruction Format
x86 Instruction Format
Prefix bytes
Opcode
ModR/m
Address size
SIB
Segment override
Displacement
Segment override
Immediate
Instruction prefixes
ARM Instruction Format
Immediate Constants
Thumbs Instruction Set
Unconditional (4 bits saved)
Always update conditional flags
Increases performance in 16-bit or less
data bus
Subset of instructions
Instruction Formats
Allocation of Bits
factors that determine the
use of the addressing bits.
Register versus memory
Number of register sets
Number of operands
Address range
Number of addressing modes
Address granularity
two historical machine designs balance these
various factors
PDP-8
PDP-10
Variable-Length Instructions
PDP-11
VAX
Instruction Length
Affected by and affects
Trade off between powerful instruction
repertoire and saving space
x86 and ARM Addressing Modes
x86 Instruction Formats
Base with displacement
Scaled index with displacement
Base
Base with index and displacement
Displacement
Base with Scaled Index and Displacement
Register operand
Relative
Immediate
ARM addressing modes
DATA PROCESSING INSTRUCTION ADDRESSING
BRANCH INSTRUCTIONS
LOAD/STORE ADDRESSING
LOAD/STORE MULTIPLE ADDRESSING