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INSTRUCTION SETS: CHARACTERISTICS AND FUNCTIONS - Coggle Diagram
INSTRUCTION SETS:
CHARACTERISTICS AND FUNCTIONS
Intel x86 and ARM Data Types
SIMD Data Type
x86 Data Types
Words do not need to align at even-numbered address
Data accessed across 32 bit bus in units of double word reat at addresses divisible by 4
Addressing is by 8 unit
Little endian
Can deal with data types of 8 (byte), 16 (word), 32 (doubleword), 64 (quadword), and 128 (double quadword) bits in length
x86 Data Types
Packed doubleword and packed doubleword integer
Packed quadword and packed quadword integer
Packed word and packed word integer
Packed single-precision floating-point and packed double-precision floating-point
Packed byte and packed byte integer
ARM Data Types
Unsigned integer interpretation supported for all types
Twos-complement signed integer interpretation supported for all types
For nonaligned access attempts, the architecture supports three alternatives
Alignment checking
Default
Truncate the data and set certain bits to zero depending on wheter its a word or halfword
For load single word instructions, the data is rotated to align with word boundaries, and its transferred from a non-aligned address by one, two or three bytes.
Unaligned access
Majority of implementations do not provide floating-point hardware
Support data types of 8 (byte), 16 (halfword), and 32 (word) bits in length. Halfword and word accesses should be word aligned
Intel x86 and ARM Operation Types
x86 Operation Types
Memory Management
Status flags and condition codes
Call/Return Instruction
x86 SIMP Instruction
ARM Operation Types
Multiply instructions
Parallel addition and subtraction instructions
Data-processing instructions
Extend instructions
Branch instructions
Status register access instructions
Load and store instructions
Types of Operations
Conversion
Change the format or operate on the format of data. Ex: is converting from decimal to binary
Input/Output
May be done using data movement instruction (memory mapped)
May be done by a separate controller (DMA)
May be specific instructions
Logical
AND, OR, NOT, XOR, XNOR, etc.
Shifting and rotating functions
System Control
Can be executed only while the processor is in a certain privileged state
For operating systems use
Arithmetic
Add, Subtract, Multiply, Divide
Possible Operation: Absolute, Negate, Increment, Decrement
Transfer of Control
Skip instructions
Procedure call instructions
Branch instructions
Data Transfer
Register to register transfer
Transfer Involving Memory
Specify
Types of Operands
Numbers
Binary floating point
Decimal
Binary integer or Binary fixed point
Characters: ASCII, etc
Address
Logical Data: Bits or Flag
Machine Instruction Characteristics
Instruction Types
Data storage
Data movement
Data processing
Control
Number of Addresses
1 Addresses
0 Addresses
2 Addresses
How Many Addresses
More addresses (CISC)
More registers
Fewer instructions per program
More complex instructions
Fewer addresses (RISC)
Less complex instructions
More instructions per program
Faster fetch/execution of instructions
3 Addresses
Instruction Representation
ADD: Add
SUB: subtract
MUL: multiply
DIV: divide
STOR: store data to memory
LOAD: load data from memory
Instruction Set Design
Data types
Instruction format
Operation repertoire
Registers
Addressing
Elements of a Machine Instruction
Next instruction reference
Result operand reference
Source operand reference
Source and result operands can be in one of four areas:
Main memory (or virtual memory or virtual cache)
CPU register
Immediate (on the operand itself)
I/O device
Operation code