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Week 11 Processor Structure and Function - Coggle Diagram
Week 11
Processor Structure and Function
The ARM Processor
Register Organization
Interrupt Processing
Processor Modes
Processor Organization
Register Organization
Control and Status Registers
Program counter (PC)
Instruction register (IR)
Memory address register (MAR)
Memory buffer register (MBR)
Example Microprocessor Register Organizations
User-Visible Registers
Address
Data
General purpose
Condition codes
Instruction Pipelining
Pipeline Hazards
Dealing with Branches
Prefetch branch target
Loop buffer
Branch prediction
Multiple streams
Delayed branch
Pipeline Performance
Intel 80486 Pipelining
Decode stage 2
Execute
Decode stage 1
Write back
Fetch
Pipelining Strategy
The x86 Processor Family
Register Organization
Interrupt Processing
Processor Organization
Instruction Cycle
The Indirect Cycle
Data Flow
