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Reduced Instruction Set Computers - Coggle Diagram
Reduced Instruction Set Computers
about CISC and RISC
CISC
Driving force for CISC
Intention of CISC
Ease compiler writing
Improve execution efficiency
Support more complex HLLs
RiSC
Reduced Instruction Set Computer
Key features
Large number of general purpose registers
or use of compiler technology to optimize register use
Limited and simple instruction set
Emphasis on optimising the instruction pipeline
Instruction execution characteristics
Operations performed
Assignments
Movement of data
Conditional statements (IF, LOOP)
Sequence control
Operands used
Mainly local scalar variables
Optimisation should concentrate on accessing
local variables
Execution sequencing
Compiler-based register optimization
Assume small number of registers (16-32)
Optimizing use is up to compiler
HLL programs have no explicit references to
registers
usually - think about C - register int
For each program, list possible variable
candidates which can be register
Assign these candidates into a symbolic / virtual
register
Map (unlimited) symbolic registers to real
registers
Symbolic registers that do not overlap can share
real registers
If you run out of real registers some variables
use memory
Optimization task ➔ determine which variable
can be assigned to real register
One is graph coloring algorithm
Large register file
Register is the fastest memory element
Software solution
Require compiler to allocate registers
Allocate based on most used variables in a given time
Requires sophisticated program analysis
Hardware solution
Have more registers
Thus more variables will be in registers
Register windows
Function calls only uses few parameters
Also, limited range of depth of call
Use multiple small sets of registers
Alters between function calls
Calls switch to a different set of registers
Returns switch back to a previously used set of registers
Three areas within a register set
Parameter registers
Local registers
Temporary registers
Temporary registers from one set overlap
parameter registers
This allows parameter passing without moving data
Handles n-depth procedure calls
Limited by the number of register windows
Global Variables
Allocated by the compiler to memory
So that every function can access it
Inefficient for frequently accessed variables
set of registers for global variables
Registers v Cache
Registers
Cache
RISC VS CISC
Not clear cut
Many designs borrow from both philosophies
Controversy
Quantitative
Qualitative
Problems
