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CONTROL UNIT OPERATION - Coggle Diagram

- - - - Memory buffer register (MBR)
      - Program counter (PC)
      - Memory address register (MAR)
      - • Instruction register (IR)
    - - t1
        
        First time unit
        
        Move contents of PC to MAR
      - t2
        
        Second time unit
        
        Move contents of memory location specified by MAR to
        MBR. Increment by I the contents of the PC
      - t3
        
        Third time unit
        
        Move contents of MBR to IR
    - - The proper sequence of events must be followed
      - Conflicts must be avoided
  - - - t1
        
        The address field of the instruction is transferred to the MAR
      - t2
        
        This is then used to fetch the address of the operand from memory to MBR
      - t3
        
        Finally, the address field of the IR is updated from the MBR, so that it now contains a direct rather than an indirect address
  - - - The address portion of the IR is loaded into the MAR
    - - Then the referenced memory location is read
    - - Finally, the contents of R1 and MBR are added by the ALU
        
        if 0
        
        t4
        
        increment PC
  - - - The contents of the PC are transferred to the MBR, so that they
        can be saved for return from the interrupt
    - - Then the MAR is loaded with the address at which the contents of the PC are to be saved, and the PC is loaded with the address of the start of the interrupt-processing routine
    - - The final step is to store the MBR, which contains the old value of the PC, into memory
  - - - Fetch
    - - Indirect
    - - Interrupt
    - - Execute
- - - - PQ = 00
        
        Fetch Cycle
      - PQ = 01
        
        Indirect Cycle
      - PQ = 11
        
        Interrupt Cycle
      - PQ = 10
        
        Execute Cycle
- - - - Describe the micro-operations that the processor performs
      - Determine the functions that the control unit must perform to cause the
        micro-operations to be performed
      - Define the basic elements of the processor
    - - ALU
      - Registers
      - Internal data paths
      - External data paths
      - Control unit
    - - Sequencing
      - Execution
  - - - Clock
      - Instruction register
      - Control signals from control bus
      - Flags
    - - Control signals within the processor
      - Control signals to control bus
    - - Data paths
      - ALU
      - System bus
  - - - IR (Address)
        
        MAR
    - - Memory
        
        MBR
    - - MBR
        
        Register Y
    - - Register AC + Y
        
        Register Z
    - - Register Z
        
        Register AC
  - - - Incrementer/decrementer address latch
      - Interrupt control
      - Serial I/O control