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Processor Structure and Function - Coggle Diagram
Processor Structure and Function
Processor Organization
Fetch data
Process data
Write data
Interpret instruction
processor needs to store some data
temporarily and therefore needs a small internal memory
Fetch Instruction
Register Organization
User-Visible Registers
General purpose
Data
Address
Condition codes
Control and Status Registers
Program Counter (PC)
Instruction register (IR)
Memory address register (MAR)
Memory buffer register (MBR)
Instruction Cycle
Fetch
Execute
Interrupt
Pipelining
Pipelining strategy
Pipeline Hazards
Resources
Data
Control
Types of Data Hazard
Read after write (RAW)
Write after read (WAR)
Write after write (WAW)
Dealing Branches
Multiple Streams
Prefetch Branch Target
Loop Buffer
Branch Prediction
Delayed Branch
Intel 80486 Pipelining
Interrupt Processing
Exceptions
Interrupt vector table
Interrupts
The ARM Processor
ARM is primarily a RISC system
Separate arithmetic logic unit (ALU) and shifter units
ARM architecture supports seven execution modes
Exception Modes
Supervisor mode
Abort mode
Undefined mode
Fast interrupt mode
Interrupt mode