PROCESSOR STRUCTURE AND FUNCTION
Processor Organization
Requirements
Fetch data
Process data
Interpret instruction
Write data
Fetch instruction
Register Organization
User-Visible Registers
Data
Address
General purpose
Condition codes
Index registers
Stack pointer
Segment pointers
Control and Status Registers
Register Types
Instruction Register (IR)
Memory address register (MAR)
Program Counter (PC)
Memory buffer register (MBR)
Flags
Zero
Carry
Sign
Equal
Overflow
Interrupt enable/disable
Supervisor
Instruction Cycle
Includes
Execute
Interrupt
Fetch
Indirect Cycle
Each input operand in memory is then fetched, and this process may require indirect addressing
Once the opcode is executed, a similar process may be needed to store the result in main memory
Once an instruction is fetched, its operand specifiers must be identified
Data Flow
The PC contains the address of the next instruction to be fetched
This address is moved to the MAR and placed on the address bus
The control unit requests a memory read, and the result is placed on the data bus and copied into the MBR and then moved to the IR
Meanwhile, the PC is incremented by 1, preparatory for the next fetch
Instruction Pipelining
Pipelining Strategy
Fetch operands (FO)
Calculate operands (CO)
Decode instruction (DI)
Execute instruction (EI)
Fetch instruction (FI)
Write operand (WO)
Pipeling Performance
Pipeline Hazards
Data hazards
Write after read (RAW), or antidependency
Write after write (RAW), or output dependency
Read after write (RAW), or true dependency
Dealing with branches
Intel 80486 Pipelining
Decode stage 2
Execute
Decode stage 1
Write back
Fetch
The x86 Processor Family
Register Organization
General
Segment
Control
Status
Numeric
Tag word
Instruction pointer
Flags
Interrupt Processing
Interrupts
Exceptions
Maskable interrupts
Nonmaskable interrupts
Processor-detected exceptions
Programmed exceptions
Interrupt Handling
The ARM Processor
Processor Organization
Processor Modes
Undefined mode
Fast interrupt mode
Abort mode
Interrupt mode
Supervisor mode
Register Organization
Program status registers
General-purpose registers
Interrupt Processing