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INSTRUCTION SETS (Addressing Modes and Formats) - Coggle Diagram
INSTRUCTION SETS (Addressing Modes and Formats)
Addressing Modes
Immediate
Direct
Indirect
Register
Register Indirect
Displacement
Stack
Instruction Formats
Instruction Length
Allocation of Bits
Variable-Length Instructions
Assembly Language
Load the contents of location 201 into the AC
Add the contents of location 202 to the AC
Add the contents of location 203 to the AC
Store the contents of the AC in location 204
Intel x86
Addressing Modes
Base with Displacement
Scaled Index with Displacement
Base
Base with Index and Displacement
Displacement
Base with Scaled Index and Displacement
Register Operand
Reative
Immediate
Instruction Formats
Operand sizes
Address size
Segment override
Opcode
ModR/m
SIB
Displacement
Immediate
Instruction prefixes
ARM
Addressing Modes
Data Processing
Branch Instructions
Load/Store
Load/Store Multiple
Instruction Formats
Thumb Instruction Set
has only a subset of the operations in the full instruction set and uses only a 2-bit opcode field, plus a 3-bit type field. Savings: 2 bits
The remaining savings of 9 bits comes from reductions in the operand specifications
unconditional, so the condition code field is not used