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system architecture - Coggle Diagram
system architecture
Embedded Systems
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Include microwaves, watches, traffic lights, medical equipment
Satnav, Smart Fridge, Smart TV, washing machine, microwave
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CPU
PERFORMANCE OF A CPU
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cache size – stores frequently used instructions or data or next to be used.(much quicker than fetching from ram.)
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FDE cycle
Fetch – causes the next instruction and any data involved to be fetched from main memory. The address of the next instruction contained in the PC is copied to the MAR- memory address register. The instruction/data stored in address held in MAR is copied to the MDR – memory data register. PC is increased by 1
EXECUTE
The instruction is executed. Any calculations needed are performed by the arithmetic logic unit. The result is saved back into ram
This process is repeated
DECODE
Decode – the fetched instruction is then decoded by the CU(control unit). The value/data in address(held in MAR) is passed from main memory to the MDR-memory data register.
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REGISTERS
MEMORY DATA REGISTER
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Stores data and instructions read from memory, data that is being in written to memory and data/instruction from, the address in the MAR
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Von Neumann
memory, data and code are in the same place