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Fetch execute cycle, UMA & NUMA, Data presentasion, Data Structure,…
Fetch execute cycle
fetch
CIR <-- [MBR OR MDR]
decode CIR
MAR <-- [PC]
execute <-- [CIR]
MBR/MDR <-- Memory [MAR]; PC <-- [PC] + 1
components
ALU
performs computer's data processing
Regsisters
provides internal storaage for the cpu
special
general
32 per standard pc
saves all the variables
types
PC- program counter
contains the next address for instruction coming up next
MAR - memory address register
stores data and address or instructions to be fectched
Memory data reg
store data and instruction received from mem and sent from the mem
CIR
current instruction register
sr- states reg
Cpu interconnectin
some mechism that provides communication between the components
Control unit
controls the operations of the cpu
three tasks
fetches instructions from memory
decodes instructions
executes instructions
CONTROLS TH
what it is
the way the instructions are fetched, decoded and excuted
fetch instruction that has a address within the pc counter
video
comp franklin
the fetch execute cycle
pc <- [pc] + 1
MBR or MDR <- memory contents addressed
same time
the amount of instructions don't affect the performance
Mar <- [pc]
CIR <- [MBR or MDR]
Fetch
instruction is decoded and executed
UMA & NUMA
processer
single instruction, single data (sisd) stream
Single instruction, multiple data (SIMD) stream
Multiple instruction, single data (MISD) stream
Multiple instruction, multiple data (MIMD) stream
what
computer architure
uma
data is shared equally (time)
share a common memory
numa
data is not shared equally (time)
considered a alternative to the later
structure
uma
all processes have equal access to mem
time of access is also equal
limited by the bandwidth making the cpu will be mostly idle
shared mem and shared i/o devices
numa
all processes have equal access to mem
processers will have different acesstime depending of which region of the mem is being accessed
they also access the different regions at different speeds
instructions executed in sequence and one by one
executed in sequence of operations: fetch in, fetch op, perform op, store res.
Data presentasion
Terms
ASCII ( American Standard Code for Information Interchange)
1960 - solve compatibility issues
Bit: Smallest amount of data you can have in a computer - Boolean
Byte: Collection of 8 bits - smallest possible addressable unit
Word: contiguous group of bits - any number of bits
word sizes: 16, 32, 64 are most common
BCD : binary coded decimal - 0 = 0000 , 1 = 0001
unicode: 2p16 which is used on the internet
covers 120,000+ codes
Graphics
vector
images generated from geometrical shapes
examples
svg
pdf
bitmap
divided into picture elements and pixels
which matched bit by bit to a image element
group of pixels
each pixels is store within its colour value
examples
gif
jpeg
png
more pixels better the image
but more memory required
if image are made bigger quality can be lost
pixals
depth and colour
resulation
number of pixals per inch
ppi
if increase requires more pixels which equals more memory to store
each a specific colour
600 x 400 pixels
used in gams
Monitor is seprated into rows and columns of pixals
compression
removes some bits lowering the colour depth
making similar colours a single colour
lossless( text/ programs)
run-length
huffman
lempel ziv
data integrity is preserved
redunatant data is removed
original data and data after decomp is the same
lossy
cheaper
images and videos
less space and time
techiuques
JPEG
joint photographic
MPEG
moving picture
MP3
goods
less storage, transfer, upload, download
Types
text - alphanumeric
must be stored as a binary number to be understood
stored as 7-8 bits = 128 characters
codes like: 0000000, 1111111
unicode 16 bits per
video
numbers - integers, real numbers
base 10 = 0 - 9 = decimal/denany
base 2 = 0 - 1 = binary
base 16 = 0 - 9abcdef = hexadecimal
base 8 = 7 - 0 = octom
images
RGB which use bits so they are reprensented
sounds
measured is khz
lanaguage
binary
1,1,0,0,1
15 = 4 bits
2p0 = 1 , 2p1 = 2, 2p2 = 4, 2p3 = 8, 2p4 = 16, 2p5 = 32, 2p6 = 64, 2p7 = 128, 2p8 = 256, 2p9 = 512 , 2p10 = 1,024
subtraction = 2nd complement or 2's
reverse number , + 1
Data Structure
computer architecture
store
uma and numa
cluster
store program
types
von neumann
components
harvard
components
Formula
image = W , H in pixels ,