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FLIP-FLOPS - Coggle Diagram

- - - - INVOLVE TIMING AND MEMORY DEVICES
      - BASIC BUILDING OF SEQUENTIAL LOGIC CIRCUIT IS FLIP-FLOP (FF)
  - - - HAS TWO INPUT LABELED BY R AND S AND TWO OUTPUTS LABELED BY Q AND Q
      - IF FF THE OUTPUTS ARE ALWAYS OPPOSITE
      - THE "S" AND "R" INPUT OF R-S FF OFTEN REFERRED AS " SET" AND "RESET" INPUT RESPECTIVELY
      - THE "SET" AND "RESET" ARE ACTIVATED WHEN THE INPUT IS LOW
      - OPERATION
        
        IF BOTH S AND R ARE 0 , BOTH OUTPUT ARE 1 AND THIS STATE CALLED PROHIBITED STATE AND IS NOT USED
        
        IF S=0 AND R=1 THE Q OUTPUT IS SET TO LOGICAL 1, THIS CALLED SET CONDITION
        
        IF S=1 AND R=0 THE Q OUTPUT IS SET TO LOGICAL 0 , THIS CALLED RESET CONDITION
        
        IF S=1 AND R=1 THE BOTH OUTPUT IS IDLE AND WILL HAVE SAME CONDITION FROM PREVIOUS STATE, THIS CALLED HOLD CONDITION
    - - ALMOST SIMILAR WITH R-S FF, BUT HAS ADDITIONAL INPUT CLK CALLED "CLOCK"
      - THE CLOCKED R-S FF WILL BE "SET" WHEN S INPUT IS 1 AND WILL " RESET" WHEN R INPUT IS 1
      - HOWEVER THE CLOCKED RS FF ONLY WILL CHANGE THE OUTPUT WHEN RECEIVE A PULSE FROM CLK
      - THE CLK INPUT HAS NO EFFECT WHEN BOTH S AND R INPUT ARE 0
      - PROPERTIES
        
        THE OUTPUT CHNAGE ONLY ON A CLOCK PULSE
        
        THE CALLED FF OPERATES SYNCHRONOUSLY (OPERATES IN STEP WITH THE CLOCK)
        
        SYNCHRONOUS OPERATION IS IMPORTANT IN CALCULATORS AND COMPUTERS WHERE EACH STEP MUST HAPPEN IN AN EXACT ORDER
        
        ONES AND CLOCKED RS FF IS SET OR RESET , IT WILL STAYS THAT WAY EVEN IF U CHANGE SOME INPUTS - HOLD MODE
        
        THIS IS A MEMORY CHARACTERISTICS AND EXTREMELY IMPORTANT FOR MANY DIGITAL CIRCUITS
    - - HAS ONLY ONE DATA INUT (D) AND A CLOCK INPUT (CLK)
      - D FF OFTEN CALLED DELAY FF, WORD "DELAY" DESCRIBE WHAT HAPPENS TO THE DATA / INFORMATION / INPUT D
      - THE DATA (0 OR 1) AT INPUT D IS DELAYED ONE CLOCK PULSE FROM GETTING TO OUTPUT Q
      - THE OUTPUT Q IS FOLLOWS INPUT D AFTER ONE CLOCK PULSE
      - COMMERCIAL D FF -7474TTL
        
        MOST COMMONLY U WILL USE A D FF CONTAINED IN IC.
        
        TYPICAL COMMERCIAL D FF HAS TWO EXTRA INPUTS
        
        PS (PRESET) -INPUT 0 WILL SET THE Q TO 1
        
        CLR(CLEAR) - INPUT 0 WILL SET Q TO 0
        
        BOTH WILL OVERWRITE INPUT CAME FROM D TO CLK
        
        INPUT PS AND CLR CALLED ASYNCHRONOUS INPUTS
        
        INPUT AT D AND CLK CALLED SYNCHRONOUS INPUTS
        
        D AND CLK INPUT CAN BE USED TO "SET" AND "RESET" THE D FF OUTPUT WHEN BOTH PS AND CLR INPUT IS 1
        
        SET - D INPUT IS 1. RESET - D INPUT IS 0
        
        THE OUTPUT OF Q CARRY THE INPUT DATA OF D IN STEP WITH CLOCK PULSE. THE CALLED SYNCHRONOUS OPERATION
        
        THE INPUT DATA FROM D WILL TRANSFER TO OUTPUT Q AFTER LOW-TO-HIGH TRANSITION OF THE CLOCK PULSE
        
        D FFs ARE SEQUENTIAL LOGIC DEVICES WHICH ARE WIDELY USED IN TEMPORARY MEMORY DEVICES
    - - IS CONSIDERED AS UNIVERSAL FLIP-FLOP, HAVING THE FEATURES OF ALL THE OTHER TYPES OF FF
      - THE INPUT LABELED WITH J AND K, CLK FOR CLOCK INPUT
      - COMMERCIAL 7476 TTL J-K FF
        
        HAS TWO ADDITIONAL ASYNCHRONOUS INPUTS, PS AND CLR, THE FUNCTION SAME AS COMMERCIAL PS AND CLR D FF
        
        THE SYNCHRONOUS INPUTS ARE J,K AND CLK