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THE MEMORY SYSTEM - Coggle Diagram
THE MEMORY SYSTEM
high performance access speed
limited capacity
Expensive to produce
Primary Storge
Secondary Storage
Large capacity
Cheaper
Slower performance
serial access memory
Shift Registers
SIPO
PISO
Queues
First in First out
last in First out
Random access memory
ROM
Flash ROM
ROM EEPROM
ROM EPROM
ROM PROM
Mask ROM
RAM
DRAM
SRAM
SRAM
very low power
Fast access time
Expensive
DRAM
Simple & less complex memory cells
Higher desity memory
Slowly access time
Periodic refreshment
DRAM
Synchronous DRAM
Synchoroues DDR
Asynchronous DRAM
EEPROM
Possible ease the contents
Does not have be removed physically
are required for erasing writing and reading the stored date
Maping Function
Direct mapping
Associative mapping
Set-associate mapping
Memory address
Word
Block
tag
Memory Speed measure
Memory access time
Memory cycle time
Memory latency
Virtual Memory
Higher memory address space
Translation Mechanism
Secondary Storage
Low cost pebit
Economically practical for storing