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COMP22111: Processor Microarchitecture - Coggle Diagram
COMP22111: Processor Microarchitecture
Introduction to STUMP
When drawing a specification, you should have some awareness of teh tech constraints including speed, powe consumption and operating voltage.
Designing the ISA
The ISA is a detailed description o the instruction set.
It is the bridge between software and hardware and influences software in terms of available instructions, operators and available adddressing modes
Factors that influence a design are:
where you get info
bus sizes
operation
operands
Large instruction set imples small programs which allow a large memory width and small memory depth.
Small instruction set imples large programs with a small memory width and large memory depth.
Addressing modes
Absolute - instr contains add
Immediate - operand in instr
Indirect - add in instr specifies add in mem
Register - operand is in register referenced in instr
Register indirect - register contains add where operand is found
Immediate offset - instr contains register reference and offset. Add offset to address in reg.
CISC
Hardware
Variable instructions size
Low number of instructions per program
Can access data held in memory
Higher number of cycles per instruction
Efficient memory use
RISC
Software
High number of instructions per program
Ony operates on data in local registers
Low number of cycles
Heavy memory use
Overview of MU0
MU0 processor has a 12 bit PC and 16 bit IR and Acc. The address bus is 12 bits and the data bus is 16 bits.
Introduction to Stump
Addressing modes used in STUMP are:
Immediate, register, register indirect, immediate offset, register offset, PC offset
Instructions
All instructions apart from branch can have a type one variant
Shift operations
Arithmetic Shift Right - A15 twice
Clockwise Circular Shift - A0 around to the left
Clockwise Cirular Shift through the carry - C on the left
R0 is hardwired to 0
For an ADD/SUB instruction we would expect an invalid result when the signs of the operands are the same/difference
Stump ALU
Functions
Determines the state of the status flags
Generates a result depending upon the operation required by the processor
You cannot set flags for the load/store operations
Verilog
Sequential Systems
Implementing a Processor
Introduction to CMOS
CAD Tools and Chip Placement
VLSI, Verification and Testing
Timing and Clocking
Instruction Set Architecture
Specialised Processing Architectures
Floating Point Arithmetic
Graphics Processing Units
Field Programmable Gate Arrays
Google TPUs
Future