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Device level and physical fault localization - Coggle Diagram
Device level and physical fault localization
EBAC
in back-end
trace opens, shorts in metals/interconnects
metal track absorbs some of decelerated electrons -> flow through needle
Electron-beam absorbed current
EBIC
Electron-beam induced current
in front-end
in p-n junctions
primary electrons create electron-whole pairs, EBIC current can be measured with amplfiier
EBIRCH
Electron-beam induced resistance change
low-resistive electrical faults
works like OBIRCH
FIB
selectively remove/deposit material
Dig holes
Remove layers
Access metals
Cut and reconnect metal tracks
make a cross-section
Voltage contrast
grounded vs. not grounded structures
sample must be grounded
Nanoprobing
in-SEM probing
Fast SEM image of what you are probing
Large field of view
Neeldes in electric & magnetic field
difficult needle landing
possible ‘damage’ of E-Beam
Atomic force probing
Small field of view (~25x25 um)
AFM image of each needle!
Fully automated needle landing and probing
6-8x probe heads
Parameter analyser: full transistor I-V characterization
PICO current module: leakage current map (cf, voltage, contrast)
Scanning Capacitance Imaging: display P/N polarities.
Necessary tom improve localization (find failing transistor below spot)
Identify the current leak: (G,D,S,B) to … (G,D,S,B,W,S)
Identify sub-finger
Measure full Characteristic
E.g.: curve showing a ‘parallel transistor’ => part of the channel affected by the fail
Metal opens/short
Backside silicon removal
Grinding until few microns of Si left
Etch away last of Silicon (Gox and Silicide remain intact)
--> all transistors visible, SEM can reveal damage
TEM
Lamella
Protect top with Pt
Cut FIB XS both sides
Leave a ‘wall’
Cut loose on all sides
Transfer to a needle
Lift free from IC
Transfer to TEM grid
Sample thinning until electron transparent
0.2 nm resolution (higher than SEM)
Scattering gives information about crystal structure
Energy loss of electrons gives information about material composition