E252 Lesson 1

BJT

Differential Amplifiers

PNP

NPN

Analysis

DC

AC

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PNP

Formula

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VIN1 and VIN2 are grounded (𝑉_𝐡=0).

Using Ohms Law, 𝑰𝑹𝑬=(π‘½π’„π’„βˆ’π‘½π‘¬)/𝑹𝑬

Assume the transistors are well matched and large Ξ²,

𝑰𝑬=𝑰𝑹𝑬/𝟐

𝑰π‘ͺ=𝑰𝑬

𝑰𝑩=𝑰π‘ͺ/𝜷

𝐼𝑅𝐢=𝐼𝐢⇒ 𝑽𝑹π‘ͺ=𝐼𝑅𝐢 𝑅𝐢=𝑰π‘ͺ 𝑹_π‘ͺ

Using KVL, 𝑽π‘ͺ=𝑽𝑬𝑬+𝑽_𝑹π‘ͺ

VOUT1 = VOUT2 = VC

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Differential amplifier is used to amplify the differential component of the input signals, however the common component of the input signals will also appear at the output.

In practice, this common mode component will cause an error in the measurement of the signals.

AC analysis is performed to find out these system responses:

Differential Mode Gain : Adm

Common Mode Gain : Acm

Common Mode Rejection Ratio : CMRR = |Adm|/|Acm|

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To analysis its differential mode, the transistors are redrawn in equivalent t-model, and the following equations are obtained:

AC emitter resistance, 𝒓𝒆=𝑽𝑻/𝑰𝑬 =πŸπŸ“π’Žπ‘½/𝑰𝑬

Differential Mode gain, π‘¨π’…π’Ž=𝑹π‘ͺ/(πŸπ’“_𝒆 )

To analysis its common mode, it is obtained from β€œhalf circuits”:

Common Mode gain, π‘¨π’„π’Ž=𝑹π‘ͺ/(πŸπ‘Ή_𝑬 )

The ratio of the differential gain and common mode gain is:

Common Mode Rejection Ratio, CMRR =π‘¨π’…π’Ž/π‘¨π’„π’Ž

CMRR

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What is common in both inputs? Noise

What is different in both inputs? Voice

For a good amplifier:

Differential mode gain should be amplified

Common mode gain should be attenuated.

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Differential mode gain, Adm to the common mode gain, Acm

(signal) (noise)

"CMRR"=|π‘¨π’…π’Ž/π‘¨π’„π’Ž |

Thus CMRR shows how well the signal can be amplified and how well the noise is attenuated.

The main goal in circuit design is to minimize the noise level (or improve signal-to-noise ratio).

Thus, a large CMRR is desirable as it is less sensitive to noise. (CMRR>> 1). Since the CMRR can be a large number, it is often expressed in decibels or dB.

"CMRR" ("dB" )=πŸπŸŽγ€–"log" γ€—"10" |π‘¨π’…π’Ž/𝑨_π’„π’Ž |

NPN

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VIN1 and VIN2 are grounded (𝑉_𝐡=0).

Using Ohms Law, 𝑰𝑹𝑬=(π‘½π‘¬βˆ’π‘½π‘¬π‘¬)/𝑹𝑬

Assume the transistors are well matched and large Ξ²,

𝑰𝑬=𝑰𝑹𝑬/𝟐

𝑰π‘ͺ=𝑰𝑬

𝑰𝑩=𝑰π‘ͺ/𝜷

𝐼𝑅𝐢=𝐼𝐢⇒ 𝑽𝑹π‘ͺ=𝐼𝑅𝐢 𝑅𝐢=𝑰π‘ͺ 𝑹_π‘ͺ

Using KVL, 𝑽π‘ͺ=𝑽π‘ͺπ‘ͺβˆ’π‘½_𝑹π‘ͺ

VOUT1 = VOUT2 = VC

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