Computer Science Revision Checklist
SLR1: Systems Architecture and Storage
SS1: CPU Components
Arithmetic Logic Unit (ALU)
Control Unit (CU)
Clock
Cache
Registors
Buses
Address Bus
Data Bus
Control Bus
The unit that synchronizes components by generating pulses at constant rates.
Sends signals that controls how data moves through the CPU.
Provides fast access to frequently used instructions and data.
The ALU is responsible for arithmetic calculations and making logical decisions.
Super fast pieces of onboard memory.
Each have very specific designs.
Commands and control signals when they are reads or write.
Carries addresses which data needs to be read or written from.
Carries the actual data or instructions.
SS2: Von Neumann Architecture
Von Neumann designed computers that have stored programs which could be used for more than one thing. (1945)
Resistor includes:
Accumulator
MAR
Program Counter (PC)
Memory Data Resistor (MDR)
Holds the address of the instruction to be executed.
Holds the data fetched from, or to be written into memory.
Fetch
Decode
Execute
Address is copied into the address register.
The control unit decodes the instructions
A copy of 23 is placed in the cache again.