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Logic gates, Questions - Coggle Diagram
Review:
Ch2
Binary, Denary, Hex and Oct
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Inverter
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Active low:
That just means that when the output is active it has a logic low value, rather than a logic high
AND
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Register, decoder and frequency display
OR
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(A, B, C) Timing diagram is low only when A, B, C are low simultaneously
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NAND
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If either A or B or both tanks drop bbelow the limit, turn on the red light
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NOR
When a landing gear is retracted, its sensor produces highIf extended, its sensor produces low
If any one is high, the green light is off
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Questions
High level when asserted, low level when not: Is required for an inverter input.
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