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BLOCK 1.1 CMOS Technologies: Evolution - Coggle Diagram
BLOCK 1.1
CMOS Technologies:
Evolution
History
1946, Electronic Numerical Integrator and Computer (ENIAC). Military applications. Vacuum valves in a two floor room of 160m2
1947, Bardeen, Brattain i Schockley (Bell Labs) invented the transistor (discrete components ers)
1958, First circuit over a single substrate with MESA components and interconnected by wires (Kilby)
2002, INTEL Core Duo, 65 nanometer, 410 M transistors, 3 GHz, L2 cache
1966, First totally integrated circuit including interconnections (Noyce)
1971, First microprocessor INTEL 4004, 10 micrometer Process, 740 KHz, 2300 transistors
2017, FINFET 14 nanometer process, 8 billion transistors
2020, Mare Nostrum computer, 11PFlops
QUANTUM COMPUTERS
Questions!
Why Silicon and not other semiconductors? Ge, GaAs, SiC, GaN, diamond...
Why CMOS and not bipolar technology?
What happens with III-V, SiC and III-VI technology?
Moore's law
As the number of transistors goes up
Cost per transistor goas down
Cramming more components onto integrated circuits
Moore's second law
The capital cost of a semiconductor fab increases exponentially over time
Paradoxes
It's not a physical law
, it's just how research, industry, market, economy, capital and concumers respond
Performance
is not exponentially increasing for some task as operating systems and software increase in complexity
A negative implication is
obsolescence
as rapid improvements render predecessor technologies obsolete
Data, security, survivability and continued operations
are compromised by rapidly changing technologies
The phenomena that the number of transistors that fit on a single chip grows exponentially
Definition of the Half Pitch
ITRS definitions
Scaling "More Moore"
Geometrical (constant field) scaling
Continued shrinking of horizontal and vertical physical features sizes of the on-clip logic and memory storage functions in order to improve density (cost per function reduction) and performance (speed, power) and reliability values to the applications and end costumers
Equivalent scaling
Occurs in conjunction with, and also enables, continued geometrical scaling, refers to 3D device structure ("Design factor") improvements plus other non-geometrical process techniques and new materials that affect the electrical performance of the chip
Functional diversification "More than Moore"
The incorporation into devices of functionalities that do not necessarily scale according to "Moore's law", but provide additional value to the end costumer in different ways. The "More that more" approach typically allows for the non-digital functionalities (e.g. RF communication, power control, passive components, sensors, actuators) to migrate from the system board-level into a particular package-level (SiP) or chip-level (SoC) potential solution
Devices
1968-2003, First age of scaling: self aligned silicon gate of basic MOS device
2003-2016, Second age of scaling: equivalent scaling with new materials
2016-..., Third age of scaling: 3D and power scaling
High performance computing
Can be done in an enclosed system
(supercomputers)
or in a distributed system with many nodes
(grid computing, cloud computing).
Many distributed nodes are a typical example of high parallelism in big data applications (distributed sensing, social networks, internet purchases, online business)
Complex systems with millions of cores, high parallelism, operated in Linux and it's performance measured in
FLOPS Floating Operations Per Second)
and are often used for complex engineering, scientific or complex modelling calculations
Used intensively in calculations and modelling data in nanoscience and nanotechnology
Mare Nostrum computer - the most powerful supercomputer in Spain
