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MEMORY ARRAYS (Cache Memories (Manifestations (Temporal locality (Recently…

- - - - Write operation
        
        Activate world line (logic 1 or 0)
        
        Monitors the 2 bit lines
        
        Drives bit lines b and b'
      - Definition
        
        Non-volatile – Retains data
        when no power supply
      - Read operation
        
        Cell store logic 1 (state 1)
        
        Signal bit b is high (1) and b' is low (0)
        
        Activate world line (close switches T1 and T2
      - Disadvantages
        
        Expensive
      - Advantages
        
        Very low power comsumption
        
        Fast access time
    - - Characteristics
        
        Each cell charge in a capacitor
        
        Capacitor charge reduce over time
        
        Refreshed periodically - maintain charge
      - Write operation
        
        Drives bit line logic 0 or 1 to turn on transistor
      - Definition
        
        Volatile - No data when no power supply
        
        Accessed frequently
      - Read operation
        
        Charge stored to determine the state (logic 0 or 1)
        
        Capacitor charge > threshold, drives bit line to full voltage
        
        Capacitor discharge - drives bit line to ground level
      - Disadvantages
        
        Periodic refreshment
        
        Slow access time
      - Advantages
        
        Cheaper
        
        Higher density memory
      - Types
        
        SDRAM
        
        Synchronized to a common
        clock signal
        
        Single clock edge (+ or -)
        
        DDR
        
        Both
        clock edges (+ and -)
        
        Double the data transfer rate
        
        Asynchronous
        
        Low speed memory bus systems
        
        No common clock
  - - - Non-volatile memories
      - Required to store
        data for initialization system operation
    - - PROM
        
        Load
        some data
        
        Programmability - use fuse, blowing it
        creates logic 0, keeping it creates logic 1
      - EPROM
        
        Erased and new data
        to be written into it
        
        Erase method: using exposing to UV light
      - EEPROM
        
        Can be programmed, erased and reprogrammed electrically
        
        Disadvantage: different voltages are required for erasing,
        writing, and reading the stored data
      - FLASH
        
        Write an entire block of memory cells
        
        Higher density, higher capacity with lower cost
        per bit
        
        Single power supply voltage
    - - Written only once
      - Logic 0 when connected to ground, otherwise
        logic 1
- - - - Recently executed instruction is likely to be
        executed again very soon
    - - Recently executed instruction
        are likely to be executed soon
  - - - Direct Mapping
        
        Block j modulo
        128
        
        Advantage: Easy to implement
        
        Disadvantage: Not very flexible
      - Associate Mapping
        
        Any cache block position
        
        Advantages: Efficient
        
        Disadvantages: Higher implementation complexity
      - Set-Associate Mapping
        
        Combination of direct and associative mapping
        
        Advantages: Reduce hardware implementation cost and remove contention problem
  - - - LFU
        
        has got the fewest references
      - FIFO
        
        has been in the cache the longest
      - LRU
        
        longest without being referenced
    - - Replace the existing cache block data
- - - - Primary storage: independent of location’s address
      - Secondary storage: depends on the address/position of data
    - - Rate of data transfer or the number of bits can be transferred in one second
- - - - Hard disk
    - - CD-ROM