Memory
Memory Hierarchy: memory devices in a computer ranked by response time (time the component takes to answer the request for data (typically from the CPU)).
CPU registers: inverter based memory cells --> SRAM
Main Memory (RAM)
Long Term Memory (disk)
Logic Gates
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HIGHER CPU registers: inverter based memory cells --> SRAM semiconductor (0.5-0.25 ns)
MIDDLE Main Memory (RAM)--> DRAM semiconductor (50-70ns)
LOWERLong Term Memory: disk --> flash memory(5,000-50,000ns), magnetic disk (5.0e6 -2.0e7ns/ 5-20 milliseconds, slow latency also depends on the queue, 10-40 million clock cycles, a factor of about 100 slower than flash)
cost per GB goes up as the response time/storage size gets faster, why would you use slow/small memory when fast/more memory is cheaper
Memory that responds quickly is put closer to the cpu, so that it is not wasted with communications overheads.
Pros:
-different layers = more functionality
-large lower layers give the some of the effect of having larger higher layers that you can afford, ie ram to compensate for less memory being able to be stored in the CPU.
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Different Memory Technologies
It is best practice to have memory technologies to be build in the same style as the CPU
SRAM
Memory cells are directly opposite to logic gates because
-they are sequential circuits (their state depends on past inputs as well as current ones, and they incorporate feedback).
Logic gates --> inputs, the inputs set all the control gates of all the transistors in the circuits--> as a result, potential flows straight through to the output. The state of the circuits depend on their previous inputs and does not at all depend on their previous values.
Logic gates --> inputs, the inputs set all the control gates of all the transistors in the circuits--> as a result, potential flows straight through to the output. Combinational circuits (their states depend on only their current inputs)The state of the circuits depend on their previous inputs and does not at all depend on their previous values.
SRAM
-cell of 4 transistors in the middle
-each collomn forms a logic gate, with a snigle PMOS at the top and nmos at the bottom
Examples of sequential circuits Flip flop
nand gates have to stable states and can be madce to flip flop between them
can be used to store 1 bit of memory
computer memory is a structure that holds whole arrays of bits
inputs, the inputs set all the control gates of all the transistors in the circuits--> as a result, potential flows straight through to the output. Combinational circuits (their states depend on only their current inputs)The state of the circuits depend on their previous inputs and does not at all depend on their previous values.
Inverter/ not gate
The input is split between each transistor control gate
The output is the negation of the input
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reference high/reference low provides power to the cell.
Two outer nmos transitors (w1,w2) connected to the wordline (the access control for the memory cell), if worldine is high, w1 and w2 are both closed, if low w1 w2 are opena nd there is no connection between the cell and teh two horizontal bit bit lines
Data I/O : bitlines
when wordline is high, reading/writing cell along bitlines
when low, storing a single bit in the cell
Multibit memory is made from cells laid side by side
A has to not B and vice versa
nmos and pmos is closed so that high is let thought to A and it is kept at 1.
when the wordline is drved high,
nmos at T4 is closed allowing high to flow to B, allowing low to flow to A.