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Xtensa - Coggle Diagram
Xtensa
Instruction Set Architecture
Zero-overhead loop
Funnel Shift
Application-Specific Instructions
Variable-increment register windows
24 bit and 16 bit instruction size
Conditional move
Compound multiply/add
Advanced multiprocessor synchronization
Peripherals
GPIO
SPI/HSPI
UART
I2C
I2S
PWM
Unsure what to catergorize as
Internet Capability
Wi-Fi
IR Remote Control
Sniffer
Interrupts
DEMO (Display Screen Console Program)
Versatile
Low Budget
Power Saving Architecture
High Durability
Compact/Small Footprint
Extensibility
State Register Extensions
Source or destination of various instructions
Saved and Restored by the operating system
Register File Extensions
Instruction Extensions
Coprocessor Extensions
Usability
IoT Applications