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The Central Processing Unit (CPU) (Cache memory (3 levels - level 1 is the…
The Central Processing Unit (CPU)
Fetch-Decode-Execute cycle
The CU reads the memory address of the instruction, then copies the instructions into a register
The memory address is incremented to signal the next instructions address
The instruction is decoded by the CU, and other necessary values are loaded into registers
The instruction is executed - it may be a calculation or logic operation, or sometimes loading data from the memory
Von Neumann architecture
Uses one memory for both instructions and data
Can't distinguish between data and instructions
Executes programs by doing one instruction after the next using fetch-execute cycle
Advantages:
Simplifies the micro controller chip as only one memory is accessed
RAM can be used for both data storage and program instruction storage
Allows greater flexibility in developing software, particularly operating systems
Disadvantages
Only one bus connecting memory and CPU - leads to Von Neumann bottleneck where instructions have to wait to be processed
Can lead to a system crash if confusion between data and instructions
The clock
The speed of a computer is its clock speed - how many fetch - execute cycles per second
The faster the clock the faster the speed
Clock continually alternates between 1 and 0 - beginning of a cycle is when signal goes from 0 to 1
Used to synchronise the processes and instruction performance
Cache memory
3 levels - level 1 is the fastest and smallest, located in the CPU, level 3 is the largest but slowest, on its own separate component
Small but expensive due to its speed
Connected to the processor via a "backside bus" - only transfers single words unlike main memory which transfers blocks of data
Stores data regularly used by the ALU
The CU checks for data, if the data is there it is a cache hit, otherwise a cache miss
The larger the cache, the more likely a cache hit
The ALU
Stores intermediary data in registers
Does calculations such as binary shift, addition subtraction etc.
Performs logic operations eg. AND, OR
Performs an operation, and the output is sent back to the registers
Also does logical comparions
The CU
Inside the CPU - used to control the flow of data within the system
Controls sequential instruction execution
Keeps track of the memory address of each instruction
Controls the CPU - executed instructions for the read-write cycle
Regulates and controls processor timing
The data bus
Collection of wiring through which data is transmitted
May be separate buses for data, instructions and memory addresses, to decrease interference and maximise speed
CPU bus internal to CPU - transport data to and from the ALU
Carries data and operations between computer components
Performance factors
Cache type - this controls how quickly data can be fetches, and so how quickly instructions can be executed
Cache size - a smaller cache size means more cache misses, which means more time spent locating correct data
Clock speed - the speed at which instructions are executed depend on the speed
Number of cores - the more cores the more instructions can be executed simultaneously