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Computer Function and Interconnection (Point-to-Point interconnection (QPI…
Computer Function and Interconnection
Computer components
Contemporary computer designs are based on concepts develop by John von Neumann
Data and instructions are stored in a single read-write memory
Execution occurs in a sequential fashion from one instruction to the next
The contents of this memory are addressable by location, without regard to the type of data contained there
Software
A sequence of codes or instructions
Major components
I/O components
Input module
Contains basic components for accepting data & instruction and convert into an internal form of signals usable by the system
Output module
Means of reporting results
CPU
Instruction interpreter
Module or general of general-purpose arithmetic and logis functions
I/O buffer register
I/O address register
Memory buffer register
Memory address register
Interconnection structure
The collection of paths connection the various models, a computer consists of a set of components(CPU,memory,I/O) that communicate with each other.
I/O to processor
Processor reads data from an I/O device via an I/O module
Processor to I/O
Processor sends data to the I/O device
Processor to memory
Processor writes the instruction to memory
I/O to or from memory
An I/O module is allowed to exchange data directly with memory without going through the processor using directly memory access
Memory to processor
Processor read an instruction from memory
Bus interconnection is a communication pathway connecting 2 or more devices
Bus structure
Its just 50-100 lines only. Each line is assigned a particular meaning or function
The lines can be classified as 3 group; data lines, address lines and control lines
Multiple bus hierarchies
Elements of bus design
Bus design, method of arbitration, timing, bus width, data transfer type and block data transfer
Peripheral Component Interconnection express
A high bandwidth, processor independent bus that can function as a mezzanine or peripheral bus
PCIe transacting layer
PCI physical and logical architecture
PCI physical layer
PCIe data link layer
Point-to-Point interconnection
QPI link layer
Perform 2 key: flow control and error control
QPI routing layer
Determine the course that a packet will traverse across the available system interconnects
QPI protocol layer
Key function is a cache coherency protocol which deals with make sure the main memory values held in multiple caches are consistent
QPI physical layer
Computer function
Interrupts
Program, timer, I/O, hardware failure
I/O function
I/O module can exchange data directly with the processor. Processor read data from or write data to an I/O module. Its desirable to allow I/O exchange to occur directly with the memory.
Instruction fetch and execute
Processor fetches an insruction from memory. Register called the PC hold the address(instruction) to be fetches next. Its fetch in sequence. The fetched instruction is loaded into the IR.