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Computer Systems (Graphic Representation - Bitmapped (Graphic…
Computer Systems
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Unicode
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Using 16 bit i.e. 2=65,536 characters can be represented.
Can represent Latin, Roman, Japanese characters.
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Fetch Execute Cycle
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MAR (Memory Address Register) sets up the address bus with the relevant memory location to be read from
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The term fetch/execute is used to describe the process of sending and receiving data to/from the processor and memory
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Memory read operation
When a memory read operation occurs, data is read from a memory address and taken to the processor.
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MAR (Memory Address Register) sets up the address bus with the relevant memory location to be read from
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Cache Memory
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It’s organised as Level 1, Level 2 & Level 3, where level 1 is the fastest.
Like RAM, Cache memory is volatile so contents are lost when the power is lost.
SRAM
Once its contents have been written, there is no need to refresh the contents of SRAM.
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Has more complex design than DRAM, meaning it costs a lot more to manufacture.
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Processor
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The speed of a computer's processor chip is known as its clock speed and is measured in Giga Hertz (GHz), with the fastest modern processor currently running at up to 4.7GHz.
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Multi-core Processors
E.g. a 2 GHz Dual core processor can carry out 1 billion more operations per second and a 3 GHz single core processor.
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Multi-core processors are far more powerful than traditional
single cores. This is because a different process can be allocated to each core simultaneously.
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ALU &Control Unit
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Logical operations such as AND, OR, NOT
Arithmetic operations such as +, -, *, /
The control unit is the term used to describe the part of the processor containing decoding circuitry. It provides timing and regulator signals to allow the CPU to carry out the fetch/ execute cycle.
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Security risks
Cookies
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An EU Directive, incorporated in UK law now required websites toget consent from visitors to use Cookies
Cookies are used by many websites to enhance the browsing experience for users and their use will be covered in the legal disclaimer on the site
Tracking Cookies
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On other occasions programmers can set the tracking cookie up to send them usernames and personal details
‘Tracking Cookies’ are a subset of cookies that are designed to send as much data as possible to external servers/third parties
As well as concern around identity theft, these cookies can be used to target users with personalised adverts
Dos Attack
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An attack that consumes the available bandwidth at or near a target host or network, such that legitimate traffic can’t get to its destination.
DoS attacks can be inconvenient for users, but they may cost businesses millions of pounds
If Amazon was inaccessible due to a DoS attack, users may shop elsewhere resulting in Loss of Revenue
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An attack that consumes a particular resource until it is exhausted. E.g. an attacker might continuously issue requests to a Web site to create baskets or users using up available disk/memory space
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With a 'Denial of Service' attack, the server is overwhelmed by millions of rogue requests being sent to it
A DoS attack is an illegal act, with the intent of disabling a server.
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An attack that tries to overbear a given DNS server with traffic, overwhelming server resources and preventing the server from directing legitimate requests to resources
In 2015 then Washburn Computer Group in the USA experienced the shutdown of many of their websites. The culprit? A former employee.
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Registers
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Registers are fast access, temporary storage locations built into
the processor.
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MDR
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The MDR holds data that is either to be passed to the data bus or has just been received from the data bus.
Total Addressable Memory
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So a computer with an 8 bit address bus and a 16 bit data bus
would have 512 bytes of addressable memory.
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Memory Write Operation
When a memory write operation occurs, data is taken from the processor to memory.
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Buses
Data Bus
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Increasing the size of the data bus increases the amount of data
the bus can carry in a single clock cycle.
The purpose of the data bus is to transfer information to and from
the address identified by the address bus.
The Data bus is bi-directional, meaning that it can pass info in both directions CPU to RAM and vice-versa.
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Address Bus
The purpose of the address bus is to identify the address of the
location in cache or memory that is to be read from or written to.
Each location in memory has its own unique address, this is
known as address-ability.
The address bus is uni-directional, meaning that it is only passes
information one way, from the CPU to RAM.
Increasing the size of the address bus increases the number of
locations in memory that can be addressed.
Control bus
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The clock line carries a series of clock pulse at a constant rate. These pulses synchronise the processing
Interrupts
Maskable
Can be ignored by the precessor e.g. Printer out of paper, disk space low etc.
Mon Maskable
Cannot be ignored by the processor e.g. File Not Found, completely out of disk space etc.
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