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Memory management types (MMU stores (Segment map, Page map), Segmentation…

- - - - Each segment referred to Page table
        
        Segment descriptor contains indicator for each segment,
        if any page from this segment in memory, then this segment
        considered as in memory and page table for this segment is in memory.
      - Segment address (36 bits):
        18: Address of page table;
        9: Segment length;
        9: Other system bits (protection, flags)
        
        Page - 1024 words.
        
        Address (34 bits):
        18: Segment number in segment table;
        6: Page number;
        10: Offset within page.
  - - - LDT (Local Descriptor Table) describes segments local to each program (Stack, Code, Data).
      - GDT (Global Descriptor Table) describes system segments including OS itself.
      - Six registers: CS, DS, SS, ES are used.
        
        Each 16 bits:
        13: Index;
        1: LGT / GDT;
        2: Privilege level.
        
        Offset is stored in IP register.
        
        Segment descriptor:
        16: Base;
        4: Limit;
        12: Other.
        
        Hardware uses limit
        to compare with offset.
        
        Linear address = Base + Offset
        
        If paging is used, Linear address:
        10: Dir;
        10: Page;
        12: Offset.