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Issues in SoC Design (Power (Multiple clock domains (VDD (Unified Power…
Issues in SoC Design
Die Area
Big die suffers more from
detects
Smaller die lead to silicon
area wastage
on wafer
Yield Model
Yield = e ^ (pA)
p = Defect density
company invests more technical and financial efforts in reducing defect density
A = Die area
Principle of Marginal Utility
Die area, A = 25mm ^ sq
Design = 18mm ^ sq
I/O port = 3mm ^ sq
Computation optimization = 4mm ^ sq
what is it?
Performance
what is the issue for performance?
Power
Why worry about power usage?
Battery operated system
Mobile phones
Clock gating
Multiple voltage island
Multiple clock domains
VDD
Unified Power Format
VBAT
Common Power Format
Sleep modes
Reliability
Why reliability is of concern?
User perspective
The
performance
and
life span
of the product should correspond to its
price
Company perspective
Company image
Financial
implication
Safety
of users
Marketing
purposes
Why do faults occurs?
Defects probability increases along with die area
Operating at high frequency lead to
electrical noise
and increase in noise sensitvity
Cross-talk
How to deals with faults?
Design for testability
Insertion of
scan chains
and other
Build in Self Test structures
Memory and function scrubbing
Check for faulty areas
in memory, faulty functional units is
isolate
Drawback include:
no more used
during application execution
Error detection
and
correction codes
Hamming Code
Parity bits
Configurability
what is the issue for configuration?
flexibility
Why large design space exist?
Many components to choose from
Processors
Memories
Buses
Multiple implementation options available for components
Scalar
Vector
on/off chip memory
Technology Nodes
with more advance technology, size of node becomes smaller and smaller
Power and reliability constraints
Energy consumption
the amount of energy could draw varies with different power source available on the device
Cooling device
required to allocate additional space for cooling device
prevent component from overheating that could result in permanent damage or temporary malfunction
different performance goals