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Integrated Circuits (ICs) (CMOS (CMOS Logic Levels (5 Volts, 3.3 Volts, 2…
Integrated Circuits (ICs)
CMOS
Dynamic Logic
Complementary CMOS
Pseudo-NMOS
Pass-transistor logic
CMOS Layout
Silicon
Design
Width
Masking
Net List
Micron rules:
used at Infineon and Motorola
Scalable Lambda (λ) rules
ARE DOMINANT
Gate, Drain , Source
VDD
Field Effect
CMOS Logic Levels
5 Volts
3.3 Volts
2.5 Volts
1.2 Volts
1.5 Volts
1.8 Volts
Capacitive loading of a CMOS gate.
Charging
Discharching
Used in
Micro-controllers
Micro-processors
Random Access Memory (RAM)
significant power but only during switching
Low power dissipation:
power supply voltage
frequency
output load
input rise time
Short propagation delays
Depend on the power supply
Bipolar
GaAs
BiCMOS
TTL
Logic Levels
5,25 Volts
4.75 Volts
2 Volts
0.8 Volts
Noisy margin
Noise immunity
Vcc
BJT
High Power Consumption at Rest
Used for Glue Logic and Education
High packing density
Gigalevel integration
Current sinking
Current sourcing
ECL
CMOS vs TTL
Power Consumption
CMOS do not draw as much power at rest
TTL circuits are while at rest
Pricing
CMOS more expensive
TTL Cheap
Reliability
CMOS susceptible to damage
TTL are NOt
Transmission of digital signals
CMOS simpler and less expensive
TTL more expensive
propagation delay time
HIGH
1
LOW
0
tPLH
tPHL
Integrated Logic
Implament Boolean function
logic gate Typs
XOR
NOT
NOR
NAND
AND
OR
Fan- in
No of gate Connected to output
Fan-out
No of gate Connected to Input
Ring Oscillator
Gates connected together &
output fed back to input
Loading Gate
Driving Gate
MOSFET
n-channel
p-channel
ASICS
Better Preformance
Non-programable
Expensive
Track design
FPGAS
Chepar
Re-programable
Good Performance quality