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Chapter 5. Computer Organization (5-3 Main Memory (5.3.4 Cache (The CPU…
Chapter 5.
Computer Organization
5-1 Introduction
5-2 Central Processing Unit
ALU
Performs logic, shift, and arithmetic operations.
Registers
Fast stand-alone storage devices that hold data temporarily.
Control unit
Controls operations of each subsystem.
5-3 Main Memory
5.3.1 Address Space
The total number of
uniquely identifiable locations in memory
5.3.2 Memory Types
Random access memory (RAM)
Can be read from and
written to by the user.
Volatile: the information (program or data)
is lost if the computer is powered down.
Read-only memory (ROM)
Users are only allowed to read from it, but not write to it.
Nonvolatile: its contents are not lost
if you turn off the computer.
5.3.3 Memory Hierarchy
Very fast memory is usually not cheap.
5.3.4 Cache
Faster than main memory,
but slower than the CPU and its registers.
The CPU checks the cache.
If not, the CPU accesses main memory and copies
a block of memory starting with the desired word.
The block replace the previous contents of cache memory.
The CPU access the cache and copies the word.
If the word is there, it copied the word.
80-20 rule
It has been observed that most computers typically
spend 80% of the time accessing only 20% of the data.
5-4 Input/Output Subsystem
5.4.1 Non-storage Devices
Keyboard and monitor
Printer
5.4.2 Storage Devices
They are cheaper than main memory,
and their contents are nonvolatile
Magnetic
The width of the type is divided into 9 tracks.
9 vertical spots can store 8 bits of information
related to a byte plus 1 bit for error detection.
Optical
Compact Disc Read-Only Memory (CD-ROM)
The manufacturer burns the data onto the disk.
The data cannot be erased.
Compact Disc Recordable (CD-R)
User can write once to the disc,
but it can be read many times.
(WORM – write once, read many)
Compact Disc Rewritable (CD-RW)
Erasable (rewritten multiple times) optical disc
High power lasers change it from crystalline to amorphous.
Digital Versatile Disc (DVD)
The pits are smaller.
The tracks are closer to each other.
The beam is red laser instead of infrared.
Uses one to two recording layers,
and it can be single-sided or double-sided
Blu-ray
5-5 Subsystem Interconnection
5.5.1 Connecting CPU and Memory
A data bus, an address bus, and a control bus
connect the CPU and memory.
5.5.2 Connecting I/O Devices
A controller handles the I/O operations between the
CPU/memory and the much slower I/O devices.
SCSI, FireWire, and USB are common controllers.
SCSI Controller
(Small Computer System Interface)
It has a parallel interface with 8, 16, or 32 wires.
Provide a daisy chained connection. Terminated.
Each device must have a unique address (target ID)
FireWire Controller
(IEEE 1394)
High-speed serial interface that transfers data in packets,
achieving a transfer rate of up to 50MB/sec
Connect up to 63 devices in a daisy chain or
a tree connection. No termination as SCSI.
USB (Universal Serial Bus)
Serial controller used to connect low and
high speed devices to computer bus.
It is hot-swappable.
HDMI (High-Definition Multimedia Interface)
5.5.3 Addressing I/O Devices
The CPU usually uses the same bus to read data
from or write data to main memory and I/O device.
Isolated I/O Addressing
Different instructions
The instructions used to read/write memory are different
from the instructions used to read/write I/O device
Separated address spaces
Each I/O device has its own address,
and can overlap with memory addresses
Memory-mapped I/O addressing
Same instruction, same address space
CPU does not have separate instructions for
transferring data from memory or input/output device
Pro: smaller number of instructions
Con: part of address space is used for I/O
5-6 Program Execution
5.6.1 Machine Cycle
Fetch
Instruction: IR
Address: PC
Decode
Execute
5.6.2 Input/output operation
Because I/O devices operate at much slower speeds
than the CPU, the operation of the CPU must be
somehow synchronized with the I/O devices.
Programmed I/O
The CPU constantly checks the status of
the I/O drive whether it is ready to transfer.
Interrupt-driven I/O
The CPU informs the I/O device that
a transfer is going to happen; the I/O device
informs (interrupts) the CPU when it is ready.
Direct memory access (DMA)
Transfer large block of data between high-speed I/O
Need DMA controller
5-7 Different Architectures
5.7.3 Pipeline
5.7.4 Parallel Processing
5-7 A Simple Computer