CISC and RISC processors :computer: (CISC: Complex Instruction Set…
CISC and RISC processors :computer:
CISC: Complex Instruction Set Computer
CISC makes use of a large instruction set so that less lines of assembly language are needed. This means that complex and specialised instructions are built into the machines hardware and that 'load/store' instructions are embedded within the main instruction.
CISC is better than RISC at handling complex tasks because instructions are built into their hardware.
Translating high level language into assembly code is very simple for the complier because complex instructions are built in to the hardware.
A full range of addressing modes means that there is an easier way of addressing memory.
Because the code is very short, very little RAM is required to store the instructions.
It is quicker to code programmes.
CISC is more expensive because they are bigger and require more silicone to make.
It takes longer because one instruction takes multiple machine cycles to execute and it cannot support pipelining.
Has more complex hardware than RISC.
Use a lot of energy (so not ideal for mobile phones as battery would run out quickly)
Use more heat and require a method of cooling.
The format of the operation code and the instruction is different (different bit position) which makes it harder to decode. This is known as a non-uniform instruction format.
There is a more complex comelier design because CISC has different sized registers, the processor must decide on a word size that fits every register
: Laptops :computer:, desktop computers :desktop_computer: as they are made from Intel or AMD.
RISC: Reduced Instruction Set Computer
RSIC architecture allows operations to be preformed in a general purpose register with a set of simple instructions.
RISC uses less energy and can go into 'sleep mode' :battery:.
Instructions are very simple and can be executed in one clock cycle :clock11:. Simple tasks are performed quicker than CISC.
RISC makes use of pipelining because instructions take only one clock cycle to execute :toilet:.
Has simpler hardware.
It is smaller because it has a simpler circuitry. This also means its cheaper because less silicone is required.
RISC has a uniform instruction format, meaning that a single word with opcode is in the same bit position every time and it is quicker and easier for the processor to decode.
All the registers are the same size (simpler compiler design) which means that a separate floating point registers is compliant with all the other registers.
: smartphones :iphone: and tablets based around ARM processors.
It is more difficult to execute complex tasks on RISC because the processor has to combine simple instructions together before it can execute the complex instructions.
RISC had simpler addressing modes so sequences of load store arithmetic operations are needed to be written. This makes it longer to code programmes.