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system architecture (the CPU (RAM and ROM (RAM (random access memory) is…
system architecture
the CPU
the central processing unit (CPU) carries out all the processing for the computer system by following the instructions given to it.
made form billions of transistors (electronic switches) that build the logic gates to presses the data and instructions
a clock chip is an electronic device that controls the timing of signals measured in GHz (Giga Hertz). it controls the speed in which a computer will process infomation
the Fech-Decode-execute cycle is the prosess of feching the instructuins from the memory, decoding them and then executing them. the CPU is constantly doing this
RAM and ROM
RAM (random access memory) is the main memory in which the computer stores the data, applications and operating systems while in use. RAM looses all of its data when the computer is turned off
ROM (read only memory) is the memory in which the start up file is stored and can only be read from ROM does not loose its data when the computer is turned off
inside the processor
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to move information around the CPU there is are a number of busses. a bus is a communication channel which information can pass through
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types of computer system
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general purpose computer a system that can perform a wide range of tasks e.g. desktop system, laptop of tablet
embedded system a system within a product that controls the product e.g. fridge, microwave.
cache memory
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it is located very close to the CPU for quick and easy access it also has dedicated connections for faster data transfer.
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there is 3 levels of cache memory level 1 (L1) level 2 (L2) and level 3 (L3) the numbers show how far away form the CPU the cache memory is.
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L2 cache is often part of the CPU itself and runs at the same speed as the CPU it is usually a bit bigger that level 1
L3 cache is further away from the CPU on the motherboard and is larger and slower than both L1 and L2 cache
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cores
you can get quad-core and dual-core processors quad- core can do 4 fetch-decode-execute cycles at the same time and dual-core and do 2 fetch-decode-execute cycles at the same time
