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Digital Logic & Data Analysis (Digital Logic Families (Timing…
Digital Logic & Data Analysis
Boolean Algebra & Logic Gates
Digital Circuits
AND
OR
NOT
NAND
NOR
EX-OR
EX-NOR
Methods
K -map method
Quine-McClusky Method
Algebric method
Combination Logic Design
Adders
Decoders
Comparators
Multiplexers & Demultiplexers
Sequential Logic Design
Multivibrators
Flip-flops
JK
D
SR
T
JK Master Slave
Counters
Shift Registers
PIPO
PISO
PIPO
SISO
Number System & Digital Codes
Main Numeral Systems
Octal
Hexadecimal
Binary
Decimal
Codes
ASCII Code
Excess-3 code
BCD Code
Gray Code
Digital Logic Families
Timing Simulation
VHDL
Functional Simulation
Logic synthesis
CPLD and FPGA