MICROPROCESSOR
The Intel Microprocessors 8086/8088 Architecture
Functional Pin Diagram
Banking in 8086*
Instruction Set and Programming
8086 Interrupts
Peripherals and their interfacing with 8086
8086/8088 CPU Architecture,Progammer's Model
Demultiplexing of Address/Data bus
Timing diagrams for Read and Write operations in minimum and
maximum mode
Study of 8288 Bus Controller
Functioning of 8086 in Minimum mode and Maximum mode
Study of 8284 Clock Generator
Mixed Language Programming with C Language and Assembly Language.
Assembler Directives and Assembly Language Programming, Macros, Procedures
Instruction set – Data Transfer Instructions, String Instructions, Logical Instructions, Arithmetic Instructions, Transfer of Control Instructions, Processor Control Instructions
Programming based on DOS and BIOS Interrupts (INT 21H, INT 10H)
Addressing Modes
4.1 Memory Interfacing - RAM and ROM
Decoding Techniques – Partial and Absolute
4.2 8255-PPI – Block diagram, Functional PIN Diagram, CWR, operating
modes, interfacing with 8086.
4.3 8253 PIT - Block diagram, Functional PIN Diagram, CWR, operating
modes, interfacing with 8086.
4.4 8257-DMAC – Block diagram, Functional PIN Diagram, Register
organization, DMA operations and transfer modes
Intel 80386DX Processor
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Architecture of 80386 microprocessor
80386 registers – General purpose Registers, EFLAGS and Control
registers
Real mode, Protected mode, virtual 8086 mode
80386 memory management in Protected Mode – Descriptors and
selectors, descriptor tables, the memory paging mechanism
Pentium Processor
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Pentium Architecture
Superscalar Operation, Integer & Floating Point Pipeline Stages, Branch
Prediction Logic, Cache Organisation and MESI Model
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modes, programs for 8259 using ICWs and OCWs
Interfacing the 8259 in single and cascaded mode, Operating
Programmable Interrupt Controller 8259 – Block Diagram,
Servicing of Interrupts by 8086 microprocessor
Interrupt Vector Table
Interrupt Service Routine
Types of interrupts
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